Semiconductor Review: Specials Magazine

The embedded engineering sector remains one of the last industries to adopt full digital modernization, with hardware, software, and system design still operating in siloed and fragmented domains. Renesas Electronics Corporation addresses that gap through Renesas 365, powered by Altium, bringing its Digitalization Vision into an intelligently integrated cloud-based environment that connects silicon to system. Renesas 365 is a unified embedded system development platform that connects, rather than replaces, existing toolchains, integrating design intent, components, and workflows within a platform grounded in open-modeled components and contextual intelligence. Rather than forcing teams to reconcile separate environments late in development, it establishes digital continuity across domains from the outset. Establishing a Unified Design State Across Domains At the center of this shift is a shared and consistent design state. Concept definition, software development, and hardware design operate from a synchronized representation of the system, where intent carries across domains intelligently. Changes in one area are visible in others, allowing teams to identify design issues earlier, shift system integration left, and reduce rework. “We are reimagining the way embedded engineers go about designing software-defined products, bringing hardware, software, and system elements together across vendors to work as a unified ecosystem,” says Leigh Gawne, VP and Head of R&D, Digital Industries, at Renesas Electronics Corporation. The need for that shift is rooted in day-to-day engineering reality. Embedded teams still spend significant time resolving version mismatches, locating the right documentation, and configuring tools and environments before their actual system design begins. Renesas 365 targets that non-value-added burden by shifting more of that heavy lifting into the platform through modeled components, contextual awareness, and scenario evaluation. Designed as an open platform, its first implementation centers on the Renesas RA family of microcontrollers, with more than 550 MCU variants available within a model-based environment for system-aware exploration. Engineers begin by importing their existing projects or expressing design intent through freeform block diagrams in the Electronic System Designer, which the platform’s constraint modeling engine then interprets against modeled components to perform floor planning for on chip peripheral assignment and pin multiplexing, as well as additional capabilities such as power budgeting, memory consumption, and compute that will be available in the future. The platform also enables cross-probing between software and hardware domains, allowing a developer to navigate from a line of source code directly to a physical net or pin on the board. In the future, engineers can exercise what executives describe as the “power of what if,” evaluating configurations and exploring alternatives dynamically across power, memory, and performance constraints before committing to architectural decisions.

AI infrastructure providers are confronting growing limitations in bandwidth density, energy efficiency and data movement as frontier AI models continue scaling across larger compute clusters. Lightmatter built its photonic computing platform around solving interconnect bottleneck restricting the performance of traditional silicon architectures. “We are fundamentally reimagining the architecture of chips while supporting standardization across the ecosystem,” says Steve Klinger, VP of ecosystem and strategic alliance. Lightmatter’s Passage^™ 3D co-packaged optics architecture is designed to overcome the bandwidth constraints created by traditional chip interconnects. Conventional systems remain limited because high-speed data transfer occurs only through the physical perimeter of chips, restricting bandwidth scalability as compute demands increase. It addresses this limitation by developing an edgeless I/O architecture allowing SerDes placement across the full surface of a chip through vertical optical integration. Passage^™ delivers bandwidth density reaching up to 64 Tbps per chip while supporting optical distances of up to one kilometer. Lightmatter also introduced its Guide^® light engine, which replaces manually assembled discrete laser modules with semiconductor-grade integrated photonic technology. This transition improves reliability, scalability and power efficiency while reducing the physical space required for optical infrastructure deployment.