Design Ecosystem Around eFPGA Expanding

The eFPGA IP availability and adoption by security solutions and SoC design service suppliers demonstrates that eFPGA technology is expanding the ecosystem.

FREMONT, CA: The design ecosystem around embedded FPGA (eFPGA) technology is gradually expanding. The eFGPA technology offers system-on-chip (SoC) developers a quick and easy way to integrate programmable technology into their chip designs. The eFGPA technology combined with SoCs enables chip designers to execute custom logic for applications such as hardware acceleration, customisable I/O interfaces, and design security. In addition, it extends product life cycles by allowing the same SoC to serve multiple market adjacencies, adapts to emerging standards, and address changing functionality needs.

A major player in the rapidly emerging eFGPA realm is providing other companies with turnkey eFPGA design support for SoC designs. Earlier, companies partnered with embedded security specialist Intrinsic ID to integrate security options into SoCs incorporating eFPGA technology.

The security options range from secure key generation based on SRAM physician unclonable functions (PUFs) to full security solutions such as bitstream encryption, key wrapping, authentication tags, key verification, and data encryption/decryption for storage within the device, board, or system-level communications. The eFPGA technology adds significant security to its programmable logic architecture to protect critical IP, communications, and supply chains.

Intrinsic ID’s security solutions are based on PUFs, which embody the unique physical features of a specific device and are used to create a device-specific encryption key. The PUF can be standard SRAM cells or FPGA logic cells specifically configured for PUF purposes for SoCs integrating eFPGA technology. The PUF provides each device with a unique digital fingerprint, which can be used to generate an encryption root key whenever needed.

eFPGA’s Great Liaison

Many organisations are establishing better relationships to qualify their eFPGA IP for various process nodes. Earlier this year, the eFPGA IP supplier announced partnerships with other companies and enterprises, introducing their first customer-defined eFPGA block availability.

A recent invention, the fast boot rad-hard eFGPA IP, supports sub-100 microsecond boot times independent of gate count. At the same time, typical discrete FPGAs and eFPGA IPs can require hundreds of milliseconds to load their intended configurations.

The eFPGA technology is particularly suitable for defence and other long-lifecycle applications as it can accommodate system-level changes without incurring the high costs of creating and qualifying a new semiconductor device. The availability of eFPGA IP for process nodes will enhance its fast and efficient integration into SoC designs. Moreover, its adoption by security and SoC design providers shows that eFPGA technology is expanding the ecosystem one deal at a time.