Insightful semiconductor manufacturing, aided by intelligent technological progressions, can raise the security levels.
FREMONT, CA: With the proliferation of data across the industry verticals, security concerns are becoming the primary focal point for many. When it comes to semiconductors, the scenario is not much different either. Chip manufacturers are increasingly looking for ways to safeguard their products during the manufacturing phase. According to EEWeb, investing in safeguarding the system-on-chip (SoC) manufacturing will result in significant returns in the future.
Despite the security concerns, there are two factors that can’t be overlooked during semiconductor production. The first one is the production cost consideration, which is forcing the chipmakers to outsource manufacturing. Such a setup limits the visibility of the chipmakers into the manufacturing process. The other factor is the degree of complexity involved in introducing security into the manufacturing process.
For the initiation and maintenance of private communication among the integrated circuits, there is a need to establish a secure channel. When a secure channel has to be established between the security cores of the SoC device and the back end, it requires a secure communication protocol to be executed by the communicating peers. The above undertakings are not possible without the aid of cryptographic keys. Furthermore, trust between communicating chip entities has to be established through a materially unique transfer channel that remains unobservable to an adversary. Such material difference may be achieved by connecting a physical bus between the communicating entities.
When it comes to transferring the keys into each of the SoCs, the wafer-sort stage of semiconductor manufacturing is the most appropriate phase in the product life cycle to transfer the keys into individual SoCs. The above statement seems logical due to the fact that wafer soft is the initial stage in the device life cycle where unique information can be introduced into it. Manufacturers can design the SoCs with enhanced security capabilities during the wafer-sort stage enabling the users to counter the hack attempts from the adversaries.
Various applications in the connected world depend on secure devices, and such concerns are especially projected at the chip level. Upgrading the chips to tackle modern security requirements during the manufacturing phase can ease the burden on safety and risk management personnel in the long run.