Rambus

Brad Burke is a senior director of engineering at Rambus. He is responsible for the development of system-on-a-chip (SOC) product, enabling new memory tiers to further expand server memory bandwidth and capacity for next-generation CXL workloads in the data center. Prior to joining Rambus, Brad was the associate director at Microchip, overseeing the development of CXL memory controllers and SAS/SATA storage controllers. Brad has over 22 years of SOC/ASIC leadership and development experience at Microchip, Microsemi, PMC-Sierra, and LSI Logic in CXL, storage, telecom, and consumer markets. Brad holds a Bachelor of Applied Science in Computer Engineering from the University of British Columbia.

Could you provide an overview of your role and responsibilities within the company?

I am a senior director of engineering responsible for SoC integration and implementation at Rambus. My team’s main function is related to implementing and testing our SoCs both for functionality and manufacturability. This includes top-level integration of IP, full chip verification, emulation, design for test, physical design, and signal and power integrity.In my role, I draw upon my technical and management experience to ensure that the SoC integration and implementation team is executing in alignment with the operational and strategic goals of our organization. This comprises hiring, team development, execution and ensuring quality and productivity, direction and goal setting, and technical leadership among others.

What are some of the key challenges you face?

The key challenges we face as a smaller semiconductor company are managing the size and complexity, as well as the costs, of today’s SoCs.

Modern SoCs contain hundreds of billions of transistors, enabling design teams to tackle very large complex problems in a single device. This requires large amounts of resources in terms of labor as well as compute, storage, EDA tools and more. Several new technologies such as AI / ML and cloud computing are now becoming mainstream in semiconductor design, which will help somewhat alleviate this challenge, especially for small and medium-sized semiconductor companies.

Beyond that are the increasing costs in terms of both the development and mask costs. With the increasing complexity and size of SoCs, we see that the development costs are increasing accordingly. At the same time, silicon mask costs have increased significantly as the industry has moved to the sub 10nm nodes. At 3nm and below, the mask costs are in the tens of millions of dollars. The increasing costs put significant pressure to ensure the business case and volumes support the product and the target market, which consequently puts more pressure on design teams to ensure high-quality silicon with zero defects in the first revision.

What would you say are some of the futuristic trends that will have an impact in the next 18-24 months?

Two key trends that I see having an impact on semiconductor development in the next 18 – 24 months are the introduction of AI / ML into many EDA tools as well as the ability to run EDA and related workloads in the cloud. Some of the keys to success in semiconductor design are time to market, optimizing the power, performance, and area (PPA)of the silicon, engineering productivity, and ensuring the functional correctness of the design. 

AI / ML in EDA tools is leading to many innovations in SoC design, including enabling design teams to build larger, more complex SoCs, improving time to market and PPA, and helping to improve the quality of the products.Specifically, the addition of AI / ML into the silicon verification EDA toolswill improve productivity for verification engineers,allowing more complex problems to be solved. In physical design, the addition of AI / ML to tools such as place and route tools will allow for improved physical implementations allowing faster data rates, improved power, performance, area and time to closure.

EDA tool vendors as well as the cloud service providers are now offering the ability to run EDA and other semiconductor workloads on the cloud. Traditionally these workloads were run using on-premise hardware. The ability to run these workloads on the cloud will improve productivity, cost efficiency and scalability. Several highly compute-intensive jobs such as verification regressions, physical design synthesis and place and route, as well as physical verification can all be run in the cloud.

Companies can use a mix of on-premise and cloud for scalability or move to an all-cloud-based approach. The cloud improves productivity and provides scalability by allowing the designers to quickly scale the compute to match the requirements of their workloads. The cloud will be especially valuable to small and medium-sized semiconductor companies as designs continue to require more and more on-premise hardware to support the workloads required for today’s deep sub-micron highly complex SoC devices.  

What advice would you give to young professionals who are interested in pursuing a similar career, and what qualities do you think are essential for success in this field?

Some of the qualities that I believe are essential for success in this field are leadership, technical expertise, team building, execution, and business acumen. By business acumen, I mean having the ability to understand business requirements such as time to market and cost and to then balance those with building both high-quality products, alongside teams and processes.

Leadership is essential as an engineering director, and I would recommend that young professionals try to develop their leadership abilities as they progress through their careers. As an engineering leader,having the ability to communicate effectively and listen, align people and teams to a common goal, and execute and lead with integrity are some of the traits that I would recommend focusing on for this role. 

Team building is another essential tool to be successful as a director of engineering.Learning how to coach and mentor people, especially your direct reports, is an important part of management. There is a quote I have heard that I think is very applicable to this role. “You are only as good as your lieutenants” - this becomes very true when you manage large teams on complex programs.

Finally, I would recommend that young professionals try to gain a broad set of experience so that they are familiar with all aspects of the SoC flow. Many engineers when they first start their careers envision a linear career path and it most likely will not be.  I would even encourage taking a varied path as it will help build your experience as well as your understanding of other areas and disciplines. You don’t have to be a technical expert in all areas, and you likely will not be. However, having a good technical understanding is the foundation of leading an engineering team.