Jiangsu CAS Microelectronics Integration Technology Co., Ltd
Market Leader in Advanced Microelectronics Packaging Solutions

Jiangsu CAS Microelectronics Integration Technology Co., Ltd. (CASMEIT) is a prominent center for the convergence of integrated circuits (IC) and information technology (ICT) that is endeavors, based in the heart of the Huaihai Economic Zone. Primarily focusing on advanced semiconductor packaging, the firm excels in various cutting-edge packaging techniques, such as bumping, fan-out, fan-in, chip flip, SiP, and stacked packaging.

“We pioneer in advanced microelectronics packaging solutions, overcoming technical challenges to meet diverse customer needs through cutting-edge technology and material integration,” says Daping Yao, chairman and CEO of CASMEIT.

The firm offers a myriad of intricate wafer-level processes, with one standout service being wafer level packaging. This specialized process ensures that chip packaging is cost-effective and thermally efficient. CASMEIT also excels in System-in-Package (SiP) technology, where multiple chips are integrated into a single package to provide compact and efficient packaging solutions.

Beyond that, CASMEIT delivers other highly complex offerings like bump technology and wafer-level chip scale packaging (WLCSP). While bumping involves the growth of tiny metal bumps on the surface of the chip pad area to establish electrical connections, WLCSP encompasses directly packaging chips at the wafer level. These technologies improve the efficiency, compactness, and cost-effectiveness of chip packaging.

In addition to the aforementioned conventional packaging technologies, CASMEIT also develops non-traditional chip packaging methods, particularly fan-out packaging.

This novel solution can accommodate newer devices that are incompatible with older, more widely used chip packaging technologies.

Complementing its services, CASMEIT has exceptional package design capabilities, backed by its highly qualified design team of microelectronics and semiconductor packaging adept at designing intricate packaging structures. The firm further employs rigorous design verification processes such as simulations, stress analysis, and thermal management assessments within the package design process to ensure the reliability and functionality of the designs. By utilizing these techniques, CASMEIT vouches to deliver microelectronics and semiconductor packaging designs of the topmost tier.

Among the design verification and analysis processes, system simulation is a primary area of expertise for CASMEIT. It specializes in thermal and structural stress simulations for predicting packaging reliability and potential failure points. It also simulates plate and wafer-level plastic sealing processes to analyze the filling process and predict defects that occur during packaging Consequently, CASMEIT can identify areas of concern and optimize the design to enhance the overall reliability of the packaging process.

CASMEIT’s impact on the semiconductor and microelectronics industries is demonstrated by an abundance of research projects and client success stories. Its most notable task is the integration of silicone-based chips with indium phosphide chips, a process known as heterogeneous integration, for a research project. Regardless of the functional similarities seen in silicone-based chips, the various materials on the chip to be integrated presented certain complications. In this regard, CASMEIT meticulously considered design compatibility, thermal expansion, and stress management. It then selected and integrated the appropriate materials, resulting in a solution that met the client’s requirements.

Customization, state-of-the-art packaging services, solutions like fan-out WLP, and heterogeneous integration, all such innovations under its belt, CASMEIT checks all the boxes as a premiere microelectronics company. Besides, its strong commitment to addressing client requirements, pioneering packaging design, and advanced simulation capabilities positions the firm to excel and establish fresh benchmarks in advanced packaging.