Maxim Ershov, Co-founder, CEO and CTO
Today, the power-performance-area (PPA) metric and time-to-market of modern ICs are dominated by onchip interconnects and layout parasitics. Debugging these design problems and addressing the underlying issues have become extraordinarily difficult, tedious, and timeconsuming. The Electronic Design Automation (EDA) tools that were designed when transistors were the dominant challenge haven’t kept up with this dramatic paradigm shift. These other tools don’t recognize that parasitics are now the primary contributors to the degradation of IC performance, precision, power efficiency, robustness, and reliability. Parasitics cause circuits to underperform, fail, or behave in an unexpected, counter-intuitive manner.
Diakopto was founded on the premise that parasitics are now a first-order problem, and require a different class of design solutions. The company’s ParagonX solution embodies a new methodology to help engineers develop next-generation chips more effectively and efficiently. The game-changing Diakopto methodology has taken the industry by storm, already having been adopted by over 35 industry-leading customers, including some of the largest semiconductor companies, system OEMs and hyperscale data center corporations.
Diakopto is ushering in a radical new era in IC design debugging and optimization. “Our produtcs empower engineers with deep and actionable insights into parasitic effects, to speed up the analysis and optimization process,” says Maxim Ershov, the Co-founder, CEO, and CTO at Diakopto.
Diakopto’s ParagonX delivers a set of functionalities that dramatically accelerate IC design debugging and optimization. It helps users analyze, visualize and debug a broad range of problems caused by layout parasitics. The tool provides engineers with an understanding of parasitic effects so they can more quickly and intelligently identify the root causes of circuit problems caused by interconnects. “We help engineers find the proverbial needle in a haystack—the handful of most critical elements out of millions that are responsible for bottlenecks, choke points and weak areas,” states Ershov. Diakopto solutions are designed to be orders of magnitude faster and offer unprecedented ease-of-use compared to alternate solutions. With no complicated setup/configuration or CAD support needed and virtually no learning curve required, users can achieve tremendous productivity gains the same day of starting to use Diakopto’s tool.
Diakopto is ushering in a radical new era in IC design debugging and optimization
ParagonX also provides the unique capability to visualize parasitic effects over the layout to help engineers more effectively and efficiently fix their designs and layouts. The tool has been designed to streamline, simplify, and accelerate the process of debugging, optimization, and verification. No wonder that ParagonX has been successfully adopted for the development of a wide variety of IC designs, including high-speed SerDes, high-precision data converters, RFIC, image sensors, power management, custom memories, optical transceivers, low-power IoT, silicon photonics, memory PHY and general-purpose analog.
Diakopto has been instrumental in solving the previously unsolved problem of assisting engineers tasked with parasitics debugging, design optimization, and verification of today’s and tomorrow’s complex IC designs. Diakopto recently introduced its second product, and is expecting to introduce additional products over the next 12 months. “To meet the needs of our growing customer base, we have further accelerated our innovations and investment in R&D by dramatically growing the size of our engineering team in 2021,” concludes Ershov.