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Sensing systems today must capture detailed environmental data while operating within strict power and latency constraints across automotive and industrial applications. onsemi addresses this requirement by combining advanced image sensors, signal processing, and power semiconductors into tightly integrated architectures. Its approach ensures that sensing systems not only detect conditions accurately but also interpret them efficiently at the point of capture. The company’s portfolio reflects a focus on vertical integration across sensing and power domains. Its CMOS image sensors, silicon carbide power devices, and analog components are designed to function within coordinated systems. This alignment enables developers to build sensing platforms where perception, computation, and energy delivery operate as a unified framework rather than isolated functions. Advancing Sensor Architectures for Precise Data Capture onsemi develops CMOS image sensors that deliver high dynamic range and low-light sensitivity, enabling systems to capture reliable visual data under challenging conditions. These sensors are designed to maintain signal clarity across varying illumination levels, supporting applications that require consistent image quality. Pixel-level innovations allow sensors to detect subtle changes in light and motion, improving the accuracy of captured data. This capability is particularly relevant in environments where visibility fluctuates, such as automotive scenarios involving tunnels or nighttime driving. Sensor architectures are also optimized for noise reduction and signal integrity. By minimizing distortion at the capture stage, onsemi ensures that downstream processing receives accurate inputs. This foundation strengthens the overall reliability of sensing systems across use cases. Integrating Power Technologies With Sensing Systems onsemi integrates silicon carbide and power management technologies into its sensing solutions to support efficient energy usage. These components regulate power delivery to sensors and processors, ensuring stable performance across varying workloads.
Why do advanced chip programs usually rely on migrating to smaller process nodes? In leading-edge chip development, improving performance has traditionally required migrating to a more advanced process node. A shrink can deliver gains approaching 20 percent, but it comes at a price. Tens of millions of dollars in redesign efforts follow, along with renewed qualification. Each transition also resets technical risk, introducing tighter IR drop margins, greater power distribution complexity and full-chip revalidation. How does Dolphin Technology improve performance without forcing costly node migration? Dolphin Technology Inc. challenges that convention. Rather than assuming migration is the only path forward, it concentrates on extracting additional performance from the existing node. Through meticulous attention to detail across layout iteration, resistive reduction and power integrity optimization, the company delivers roughly 10 percent gains in power, performance and area. For many programs, that captures a substantial share of the gains typically linked to a full node transition. Engineering teams under cost and schedule pressure preserve margins, extend platform lifespans and postpone migration. “We iterate on the solution until we find the best fit for the application,” says Mo Tamjidi, CEO and president. What organizational structure allows Dolphin Technology to refine IP through repeated engineering cycles? Founded in 1996 and headquartered in San Jose, Dolphin Technology develops memory compilers, I/O interfaces, standard cell libraries and mixed-signal IP for mobile, automotive and high-performance SoCs. Its differentiation rests on foundry specialization and decades of accumulated IP engineering expertise. Rather than distributing resources across multiple platforms, Dolphin Technology assigns approximately 100 to 200 engineers to a single foundry ecosystem, building familiarity with process behavior at the electrical level. Global engineering teams reinforce this structure through repeated layout cycles, refining routing topology, resistance paths and parasitic interactions until further iteration yields no measurable benefit.
Aaron Fellis, Corporate Vice President and General Manager of Dielectric ALD Products, Lam Research [NASDAQ: LRCX]
Scott Green, Director Advanced Software R&D, 3D Systems Corporation
Eric Young, Senior Analog IC Design Manager, Monolithic Power Systems [NASDAQ: MPWR]
Joshua R. Windmiller, PhD, CLP, SM-IEEE, Head of New Analytes and Sensing Platforms, Dexcom, Inc (San Diego, CA)
Jill Wrucha-Munter, Commodity Manager-Electronic components, Fluke Corporation
Steve Hanna, Distinguished Engineer, Infineon Technologies
Jorge Quintana, Head of Sales North America, Anord Mardix
Silicon-proven memory IP accelerates chip innovation by reducing risk, improving performance, and enabling predictable integration across advanced semiconductor design ecosystems.
Electronic components suppliers advance through digital tools, sustainability, and enhanced support, creating efficient, transparent, and trusted partnerships with manufacturers globally.
Redefining Semiconductor Value through Precision Engineering
Our cover story, Dolphin Technology, recognized as Top Silicon-Proven Memory IP Solution 2026, addresses one of the industry’s most persistent constraints. Rather than defaulting to costly node migration, the company focuses on maximizing performance within existing process technologies. Through rigorous layout optimization, power integrity refinement and iterative design methodologies, it delivers measurable gains in power, performance and area while preserving cost efficiency and design stability. This approach allows semiconductor firms to extend node lifecycles and maintain competitiveness without incurring the risks associated with full node transitions.
This issue also highlights how adjacent innovations are enabling the broader semiconductor ecosystem. From a manufacturing perspective, Scott Green, Director Advanced Software R&D at 3D Systems Corporation, underscores the role of additive manufacturing in improving equipment precision, thermal management and structural efficiency. By enabling optimized designs that reduce vibration, improve flow dynamics, and enhance durability, additive manufacturing directly contributes to higher yield and faster time-to-market.
Complementing this, Aaron Fellis, Vice President, General Manager at Lam Research, outlines the technological shifts shaping the 3D era. As architectures evolve toward GAA transistors, 3D NAND and advanced packaging, he emphasizes the growing importance of data-driven manufacturing, multi-function process integration and new materials to sustain scaling while controlling cost and complexity.
Together, these perspectives point to a clear industry direction. Progress will depend less on brute-force scaling and more on precision engineering, intelligent data use and disciplined execution. The companies and leaders featured in this edition demonstrate how the semiconductor industry is advancing through focused innovation that delivers measurable, production-ready outcomes.
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